Synopsys’ TCAD Seminar
Synopsys’ TCAD Seminar is going virtual this year!
誠摯邀請您參加「新思科技TCAD」線上研討會，瞭解新思科技TCAD解決方案如何協助客戶用更低的成本加速半導體技術研發時間和優化，以因應先進半導體設計面臨的嚴峻挑戰，進而掌握產業新契機。「新思科技TCAD」線上研討會主題含蓋業界主要的半導體技術，包括先進邏輯、記憶體儲存、類比、功耗和光電等；並將探討基於業界標準的Sentaurus TCAD、Process Explorer等工具，整合至原子級材料建模的QuantumATK平台和TCAD-to-SPICE萃取以鏈結到電路模擬的技術應用。
請點選 Sign up/Login 完成預先線上報名及帳號啟用手續，即能在研討會上線期間(11/12~11/26) ，點閱影片觀看。
抽獎禮：獎品包括石頭掃地機器人二代 roborock S6乙只，以及AirPods Pro乙副。
Join our free TCAD Seminar to learn about the application of Synopsys TCAD solutions to accelerate the research, development and optimization of semiconductor technologies. The seminar tracks cover all major semiconductor technologies, from advanced logic and memory to analog, power and optoelectronics. The solutions presented in this seminar are based on the industry-standard Sentaurus TCAD and Process Explorer tools, integrated into simulation flows that often also include the QuantumATK platform for atomic-scale materials modeling and TCAD-to-SPICE extraction for links into circuit simulation.
Who Should Attend
TCAD engineers, technology development engineers, DTCO technologists, device and process engineers and managers who work in technology development and want to learn the latest techniques for using Synopsys TCAD products.
What You Will Learn
The purpose of this seminar is to communicate the latest enhancements in the Synopsys’ TCAD products and their application to the development of state-of-the-art semiconductor technologies. Our aim is to equip attendees with practical techniques to explore new device concepts and to optimize processes to improve device performance and manufacturability. Key topics include solution-oriented TCAD simulation flows, materials modeling, calibration methodologies and model selection, 3D process emulation, variability analysis and DTCO.
Please click Sign up/Login to complete the online registration and account activation. The pre-recorded presentation videos will be live from Nov. 12 to Nov. 26.
The giveaways and lucky draw incentives for SNUG Taiwan 2020 only apply to event participants in Taiwan. These prizes won’t be sent to regions or countries outside Taiwan. All rights reserved to Synopsys for agenda and rules change.
The seminar begins with an overview of the major semiconductor industry drivers (5G, Computing, IoT, Autonomous Driving and Vehicle Electrification) and the enablement technologies for these industries (AI, Cloud Computing, Power Electronics). These drivers create both challenges and opportunities for semiconductor manufacturers who strive to develop new products with the right mix of performance, reliability and cost to service these applications. We then describe semiconductor technology requirements to address these applications and conclude with a summary of the Synopsys TCAD roadmap.
Advanced Logic & Design for Co-Optimization (DTCO)
This session presents the latest Sentaurus TCAD techniques for simulating FinFET and gate-all-around (GAA) transistors for N3 and beyond. We describe the modeling of quantum transport in scaled channels, characterization of new metals for middle-of-line with QuantumATK, extraction of standard cell parasitics with Raphael FX, and the extraction of compact models with Mystic. The simulation flows are combined into a Design-Technology Co-Optimization (DTCO) methodology which also extends into early PDK creation and design-level evaluation of PPA metrics with feedback to technology.
This session discusses the application of Sentaurus TCAD, Process Explorer, Raphael FX to 3D-NAND and DRAM development, including optimization of bit cells, interconnect parasitic extraction, modeling of leakage currents in dielectric materials and simulation of high aspect ratio etching and deposition.
Module and Process Integration
This session presents applications of Process Explorer to the process integration and optimization of logic and memory technologies.Use models for extending the detailed 3D models generated by Process Explorer into critical simulation and analysis areas are illustrated through TCAD links between Process Explorer and Sentaurus Interconnect, for stress-modeling, and Sentaurus Topography, for detailed topographical modeling.
Analog / Power Devices & ICs
This session summarizes recent enhancements in Sentaurus TCAD for the design and optimization of power devices, including methods for estimating breakdown voltage in large devices and updated calibration of SiC implantation. We illustrate the application of a new optimization framework to the structural optimization of silicon power devices. Several application examples in GaN HFET are also discussed.
This final session discusses the recent enhancements to Sentaurus Device EMW for optical simulation CMOS image sensor (CIS) and calibration methodologies for the process modeling of CIS.The latest features to support the integration of Sentaurus and RSOFT are demonstrated in the context of Si photonics applications.
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