資訊 Info
Low Power Design Workshop: Achieving Accuracy and Efficiency through Innovative Solutions
Join us for an insightful 3-hour workshop, focusing on end-to-end low power design solutions, power estimation, reduction techniques, and the latest updates in UPF and Zebu-Empower technology.
地點：台灣新思科技(股)公司 竹科分公司 B101會議廳
新竹科學園區工業東四路25號
時間：2023 年 6 月 7 日 (星期三) 9:00 - 12:00 (Invitation Only)
講師：
Marty Huang, R&D Engineer , Staff
Werther Ye, Applications Engineer, Sr.
Tiger Hsu, Applications Engineer, Sr. Staff
議程 Agenda
議程
| Time | Agenda |
|---|---|
9:00 - 9:15 | Check-in |
9:15 - 9:30 | End-to-End Low Power Introduction and Challenges |
9:30 - 10:00 | Early and Accurate RTL Power Estimation and Reduction – Prime Power RTL |
10:00 - 10:25 | Prime Power Update and Power Optimize in Chip Implementation – Prime Power |
10:25 - 10:30 | Break |
10:30 - 11:00 | Rapid Power Profiling for Real Software Workloads - Zebu-Empower |
11:00 - 11:25 | UPF Solution Update - UPFA and VCLP |
11:25 - 11:50 | Open Discussion |
簡介 Introduction
研討會簡介
End-to-End Low Power Introduction and Challenges
Gain a comprehensive understanding of low power design concepts and explore the challenges faced in the current design landscape.
Early and Accurate RTL Power Estimation and Reduction – Prime Power RTL
Learn about advanced techniques for accurate RTL power estimation and discover strategies for reducing power consumption during the design phase.
Prime Power Update and Power optimize in Chip Implementation – Prime Power
Stay updated on the latest Prime Power advancements and explore the in-design flow to optimize power consumption throughout the implementation process.
UPF Solution Update – UPFA and VCLP
UPF Generation and Optimization: Dive into advanced UPF check methodologies that synergize with ICC2/FC/Formality/VCS/UPFA to enhance low power design efficiency.
Rapid Power Profiling for Real Software Workloads - Zebu-Empower
Discover the capabilities of Zebu-Empower, an innovative solution for power-aware hardware emulation, and its role in addressing power-related design challenges.
Open Discussion
Participate in a dynamic open discussion session, where you can ask questions, share experiences, and collaborate on potential solutions to low power design challenges with industry experts and fellow attendees.
Don't miss this opportunity to enhance your knowledge of low power design techniques and stay at the forefront of the rapidly advancing SoC design landscape. Register now to reserve your seat in this comprehensive workshop.
